Study of Flicker Noise for Zero-IF Receiver

Zero-IF receiver has some advantages, such as small factor, low cost and easily integrated on a chip. They make it competitive of RF receivers. However, DC Offset and flicker noise, etc., have profound effects in zero-IF receiver, which need not be considered in super-heterodyne receiver. Following a major study of flicker noise, possible solutions are given, especially those based on the passive mixer. Introduction Wireless communication becomes more and more important with the tendency of personal communication. Because wireless communication becomes digital, networking, small and intelligent, radio system will be changed from analog, digital to software. Accordingly, large translation will happen to the receiver architecture. [1] The receiver may usually be realized by super-heterodyne architecture. For super-heterodyne receiver, RF modulated signal can be shifted to easily processed IF and IF modulated signal can be handled: amplification, filtration and demodulation. Particular gain control, noise figure and narrow-band selection may be realized in super-heterodyne architecture, but there are some inherent disadvantages, such as complicated architecture, difficult coordination, bulk, and large power consumption. As a result, new receiver architecture appears. There are digital IF receiver, zero-IF receiver (also called direct-conversion receiver), etc., meeting the demands of high performance, low power consumption, agility and convenience. Because zero-IF receiver is similar to software-radio receiver in many ways, this paper presents flicker noise based on zero-IF receiver. 1. Zero-IF Receiver The architecture of zero-IF receiver is shown as Figure 1.The zero-IF receiver employs only one stage mixing to down-convert the RF signal directly to the desired base-band signal. Figure 1: zero-IF receiver architecture Because of no IF stage, zero-IF receiver has following merits: [2][3][4] (1) There is no image problem, so the image reject filter is not needed. The receiver architecture is simplified. (2) Because IF=0, only LPF is needed. LPF is easily integrated; low power and small chip proportion are needed. (3) Signal amplification happens at base-band (BB), which reduces energy consumption once more. However, there are some drawbacks on zero-IF architecture [2][3]. First, LO signal is the same frequency as the carrier, so the parasitism LO signal leaks from the receiver to the antenna, which interferes with other same frequency-band receivers. Second, even-order distortions fall into the base-band and cannot be filled. Third, flicker noise from any active device, which is close to DC in the spectrum, can contaminate low frequency base-band signal. Forth, DC offset, which comes from the self-mixing of LO leakage, is able to deteriorate the SNR (Signal Noise Rate) seriously. As a result, zero-IF receiver is not widely used previously. But when all of the above-mentioned problems are solved or largely mitigated, zero-IF retains its beauty of simplicity and thereby low costs as well as low power dissipation. This paper presents specially flicker noise of above-mentioned problems. 592 Progress In Electromagnetics Research Symposium 2005, Hangzhou, China, August 22-26 2. Study of Noise and Flicker Noise With an important 1/f character, meaning that the noise spectral density is inversely proportional to the frequency, the flicker noise is also called 1/f noise. Although there is no unifying mechanism for flicker noise, measurement on CMOS device (surface device) shows that it has much higher flicker noise than bipolar device (bulk device), possibly due to the random trapping in the oxide-silicon conduction of CMOS. [5] There is, on the other hand, an empirical formula, which is adopted by the TSMC 0.18um MM CMOS BSIM3V3 model[6][7]: V 2 n = KfI af ds CoxLeff 1 fef (1) where Coxis the unit capacitance of oxide, Kf is a device-specific constant, Leff is the length of the device, Af is the channel bias current. And ef are current and frequency index. It is impressive to know that the corner frequency of flicker and thermal noise for 0.18um NMOS can be as high as 100MHz. PMOS has lower flicker noise density (corner is below 10MHz) than NMOS, possibly due to the channel in PMOS is a little bit further away from the surface. Because flicker noise is associated with the nature of CMOS device, there is no outstanding solution to decrease it so far. [8] introduces increasing RF gain to make signal voltage value high enough. No-DC coding is used to eliminate flicker noise through HPF. [9] presents a point that mixer is designed not only to define gain but also to reduce flicker noise. Transmitter M1 and M2 of Harmonic mixer shown as figure 2 are driven by RF difference signal Vrf+ and Vrf-. M1 and M2 are primary sources. Transfusing current Io reduces current of M1 and M2. As a result, noise is reduced. Figure 2: CMOS Harmonic Mixer [10] uses two-stage down-converters instead of a direct down-converter: RF signal is down-converted to a higher IF, which is then down-converted to base-band. LO frequency used for the second down-converter is low and static, so the leakage is little and DC distortion can be easily eliminated. On the other hand, flicker noise is also reduced accordingly. This paper hereinafter presents superiority of canceling flicker noise based on single balance mixer. 3. Flicker Noise Based on Single Balance Mixer Although the passive mixer itself does not generate any flicker noise (strictly speaking, it will generate a small amount of flicker noise by DC offset during both switches half-on or off), the following base-band buffer could do so. Therefore special design is still required for the purpose of low flicker noise. Fortunately, with the frequency beating down to base-band, more methods can be applied in the base-band buffer to reduce the flicker noise, unlike the mixer, where the device length and current are limited due to the string RF performance requirement. Our solution to the flicker noise is involved with adopting the passive mixer to remove flicker noise during frequency transfer and the special low-flicker noise op-amp as post-buffer. The reason to the former is straightforward that zero DC current results in zero flicker noise and RF current has no effect on flicker noise as it far away from the thermal-flicker noise corner. As shown in Figure 4, the latter utilizes PMOS (M1 and M2) as the input stage and long channel NMOS device (M3 and M4) as the current source, which are usually the major flicker noise contributors. In this way, the flicker noise can meet the specifications quite well. Progress In Electromagnetics Research Symposium 2005, Hangzhou, China, August 22-26 593 Figure 3: Flicker Noise Contributors in the base-band post-buffer Figure 4: Filcker noise simulations of Mixer and its following buffer Figure 4 shows the spot noise figure simulation comparison results between passive mixer and active mixer, also between with backend circuit and without backend circuit. Without active backend circuit, the NF shows the contribution from the passive mixer and its biasing and loading, almost flicker noise free. With active parts (post-buffer) as the loading, flicker noise shows up, but moderate magnitude. The 100 KHz spot noise figure is only 2.5dB higher than 1MHz. When referred to the input of LNA, the discrepancy becomes negligible, only 0.1dB. Conclusion With a mayor study of flicker noise, possible solutions are given, especially those based on the passive mixer. When active mixer is used as a reference, which is a normal low bias active mixer, the advantage of using passive mixer becomes prominent. At 100KHz, active mixer has already 5dB higher noise figure than the passive one, It will further go to 20dB higher at 10KHz. Therefore, using passive mixer is an effective method to reduce flicker noise in CMOS technology.